Essential Techniques to Ensure EMI/EMC Compliance

 In Manufacturing, PCB Design

With so much design and manufacturing effort going into creating a PCB, it is necessary to improve the design to avoid expensive responses due to EMI/EMC test failures. According to Rush PCB Inc., this is easily accomplished by following some basic design techniques and principles and applying modern EMC analysis software.

Designers must overcome numerous challenges when designing printed circuit boards. These include mechanical integration, size constraints, power efficiency, and thermal considerations. EMI or Electromagnetic Interference, and EMC or Electromagnetic Compatibility only add to this complexity, introducing additional hurdles to bringing a new product to market.

Achieving low EMI in printed circuit board design is crucial, as this offers a better chance of passing regulatory EMC testing requirements such as CE Mark or FCC. Additionally, low EMI results in cleaner signals, higher measurement accuracy, lower crosstalk, and higher data rates, in essence, higher signal integrity.

By following basic design techniques and principles, designers can significantly improve the EMI/EMC performance of their projects, while ensuring their devices comply with regulatory standards, and at the same time, deliver superior performance in a wide range of applications. These design techniques and principles include:

EMI Compatible PCBs

PCB Layer Stackup

Any low-EMI PCB design must have an optimal layer stackup that defines the arrangement of the conducting and non-conducting layers within it. The following properties define these layers:

● Conducting Layers

  • Number
  • Order
  • Material
  • Copper Weight

● Non-Conducting Layers

  • Number
  • Order
  • Dielectric Material
  • Height

PCBs can be basic, single-layer designs or they can be very complex, multilayer systems, and anything in between. Typically, PCBs have more than 4 layers to meet the requirements of small component sizes and high-frequency signals. However, the designer must consider the following aspects when designing the stack:

  • All signal layers must have an adjacent return plane, either power or ground
  • A signal must preferably couple tightly to a single layer
  • Closely couple the power and ground planes to increase interplane capacitance
  • High-speed signals should preferably be contained in buried layers
  • Use multiple ground planes to decrease return path inductance
  • Route critical signals on a maximum of two layers and reference them to the same plane

Satisfying all the six criteria mentioned above is only possible with boards using 8 layers and above. Therefore, for a 4-layer PCB, the designer must make some educated trade-offs. By carefully planning the stackup to have proper layer ordering, grounding, and shielding, the designer can minimize impedance mismatch and crosstalk.

It is necessary to define a robust PCB stackup configuration in the early stages of the design, as it can save significant time and effort. On the other hand, modifying the stackup later in the design cycle can be immensely difficult and time-consuming.

Zoning and Component Placement

After defining the stackup, the designer must take the next critical step to minimize EMI. This requires a proper and effective strategy in zoning and placing components.

The designer must segregate components based on their functions and electromagnetic characteristics. This helps to prevent high-speed signals from interfering with sensitive analog circuits. It also reduces noise-coupling between different sections of the board. The designer can employ several strategies to keep physical separation between the victim and the aggressor circuits.

When grouping components, the designer must consider three main electromagnetic coupling mechanisms:

● Capacitive or Electric field coupling

● Inductive or Magnetic field coupling

● Conductive or direct coupling

Typically, the designer must aim to keep noisy circuits, such as digital logic circuits and switching DC-DC power supplies, away from sensitive RF and analog circuits. Considering the three coupling mechanisms mentioned above helps to minimize crosstalk between nets and circuits.

Optimizing Connector Locations

Cables attached to the product form the dominant unintentional antenna structures. They radiate in the lower frequency range of 30 MHz to a few hundred MHz. Connectors placed at opposing ends of a circuit board can become effective dipole antenna structures if they are interconnected with a common ground wire and have a switching IC nearby. Therefore, the designer should preferably arrange the connector placement along one edge of the PCB to prevent unintentionally radiated noise.

Power Supply Locations

The next important aspect is the effective placement of power supplies on the circuit board. The most common source of noise in any design is typically the DC-DC converters. For controlling conducted and radiated emissions the designer must place the power supply circuit optimally to minimize coupling and ringing. This includes considering the following important aspects:

● Input filtering, starting with basic L-C circuits

● Decoupling capacitors for minimizing current loops

● Avoiding the creation of unintentional resonant circuits

● Careful placement and routing of switching transistors

● Careful selection, placement, and routing of magnetic components

Considering the above factors can significantly reduce unwanted voltage and current noise in the PCB.

Decoupling Capacitor Location and Routing

Once the designer has taken care of the above important steps, they should consider decoupling capacitor location and routing as the next important step. Decoupling capacitors serve as local energy storage and provide a quick source of energy to integrated circuits when they handle rapid transient loads. They also stabilize the voltage from power supplies by filtering out spikes and noise.

For optimal performance, designers must place decoupling capacitors as close as possible to the power and ground pins of the ICs. This provides the path of least impedance and significantly enhances the decoupling effectiveness. By locating the decoupling capacitors and routing them properly, the designer can:

● Localize the switching voltage and currents

● Maintain a low impedance for a broad range of frequencies

● Minimize conducted and radiated emissions

Return Paths

Currents typically leave a source and after making a current loop, return to the source. The return current always follows a path that has the least resistance. For low frequencies, this is the path with the lowest resistance. For high frequencies, the current typically takes the path of the least inductance. Therefore, the designer must make the return path as short as possible to avoid unnecessary coupling and emissions. To achieve this, the designer must:

● Place components close together, especially those that output signals with short rise-times

● Use wide ground planes, as this reduces the inductance of the return path

● Plan a board stackup that will help in keeping short return paths

● Use continuous ground planes (no gaps)

Filter Location and Routing

Filters can be invaluable tools for suppressing unwanted frequencies and localizing noise sources. Designers can incorporate filters at critical points, such as:

● IC power pin pairs

● Signal interfaces

● Power entry

Judicious filter location and routing can significantly lower both radiated and conducted EMI. Passive filters in different combinations can optimally handle the input and output impedance of circuits.

Reducing Impedance

To achieve a low impedance between planes, designers can use stitching vias. They can uniformly distribute the vias along the reference planes, thereby effectively reducing the impedance between them. Additionally, stitching vias also helps to reduce parasitic effects. Being a simple technique, the biggest advantage of using stitching vias is they do not increase the complexity or price of the PCB.

ESD Protection

In a system, PCBs typically interconnect with other boards, sensors, power units, or even other external systems. People often have to handle PCBs. All these can create ESD or electrostatic discharge events. Although short in time, these discharges can contain substantial amounts of energy.

Adding protection elements to each connector or element that enters or leaves the board is necessary if the board needs to pass immunity tests, especially if humans can touch them. Typical protection elements that designers can use are:


These components increase or decrease their resistance with temperature changes, thereby providing automated protection. Both negative and positive temperature coefficient thermistors are available.

MOV or Metal Oxide Varistors

MOVs help to shunt current away from sensitive components during voltage spikes.

TVS or Transient Voltage Suppressors

TVS components help to clamp transient voltages that can otherwise permanently damage board components.

Digital EMC Solutions Platform

Identification, analysis, and resolving EMC issues can be significantly effortless. Designers can use Mitai, a digital solutions platform for EMC. Designed for individuals and companies to help with the design of PCBs, Mitai Augmented AI can identify potential EMI/EMC issues quickly in the layout and even provide expert recommendations for improvement.


Designing EMC-compatible PCBs can be a significant challenge. However, by following the recommendations above from Rush PCB Inc., designers can improve their skills and have their boards pass EMC tests in the first instance.