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Problems with the Gerber File Format and Solutions

Written by Rush PCB on . Posted in PCB Assembly and component, PCB Design, PCB Manufacturing, Uncategorized

The world over, a majority of designers and fabricators follow the Gerber RS-274X as the de facto standard when designing and fabricating their PCBs. The evidence of its popularity notwithstanding, Gerber has a number of practical limitations. Often, these limitations lead to a variety of problems when fabricating PCBs.

Brief History of the Gerber File Format

Ucamco developed the Gerber file format in the 1960s, when it was the Gerber Systems Corporation, and a leading provider of early photo-plotter systems using numerical controls. Their first format, RS-274D, was a subset of EIA RS-274-D, supporting their vector-based photo-plotters. Widely adopted, RS-247D remained the standard format for vector-based photo-plotters until the 1980s.

Raster scan plotters began replacing vector-based photo-plotters in the 1980s. These newer plotters were bitmap-based, requiring a completely different data format. Consequently, in 1998, Barco ETS, who had acquired Gerber Systems, released a single standard image format, and named it the Extended Gerber or GerberX. This was later renamed as the RS-274X format and is still in use today.

The latest Gerber RS-274X presents a complete image description format. Therefore, the Extended Gerber file holds the complete description of a layer of the PCB, and provides the operator with everything necessary to generate a PCB image, including the definition of any aperture shape. Requiring no external aperture files, painting, or vector-fill, the RS-274X standard specifies all pads and planes clearly and simply. Its simplicity has made it the de facto standard followed by nearly 90% of the world’s PCB designers and fabricators.

Problems with the Gerber File Format

Despite its wide acceptance and use, the RS-274X Gerber file format has its own shortcomings. The trouble is the standard does not address all aspects of fabrication and assembly, as required by the PCB fabricator.

Although Gerber RS-274X is extremely accurate and reliable when rendering images of copper shapes precisely on signal and plane layers, it does not transfer the layer stackup order accurately. Moreover, data sets and information regarding materials, drill data, netlist, pick-and-place data, bill of materials, test point reports, and more need to be generated by separate processes by different utilities. This means, the Gerber RS-274X format is incapable of transferring the complete information from the design domain to the manufacturing domain.

In the absence of a defined layer order being transferred to the manufacturer, fabrication has no way of deciding the order of copper layers and may miss a layer or two altogether. With the layer order missing, the drill data may generate holes relative to an incorrect layout. This mismatch can happen with the entire assembly data, and at all aspects of the fabrication process. Usually, with Gerber RS-274X, there is no defined way a fabricator can know about missing output data, wrong source file version, and these can render boards useless.

Designers usually get over the above shortcomings using a well-maintained design methodology and best practices shared with the fabricators. In general, they utilize Gerber RS-274X with minimum fabrication issues. However, maintaining ideal conditions all the time is difficult, things can slip up, causing problems to the fabricator and assembly houses, and now they have to face the brunt of the responsibility and sort through the issue. This also leads to fabricators and assembly houses being forced to spend a great deal of time and resource in inspecting and verifying the entire data for all incoming jobs, simply to minimize manufacturing issues.

Solutions and Alternatives to the Gerber File Format

Eminent PCB manufacturers such as Rush PCB Inc., eliminate the problems by adopting design transfer standards that addresses all aspects of the fabrication and assembly process. Two new open standards are available, and these enable efficient and accurate data exchange from the PCB designer to the manufacturing fabricators and assemblers. Ucamco administers one of these standards, the Gerber X2, while the IPC Consortium administers the other, the IPC-2581. Both are open standards, free from any proprietary restrictions.

The Gerber X2 File Format

The Gerber X2 is an expanded version of the GerberX format. In addition to the layout image data, Gerber X2 now includes design data as well. The X2 fabrication files now include the board layer order and stackup information that so far, fabricators had to interpret and verify manually. In the same way, a set of drill files is also included within the X2 fabrication files, detailing the location, drill size, plated/non-plated information, and the layer span.

The X2 attribute system qualifies objects with specifications such as file function, part, pad function, and more that add intelligence to the traditional image data improving the automation process. For instance, the file function specifies a file as top copper layer, top solder mask, while part specifies whether the PCB is a single or a panelized array, and pad function defines the pad as belonging to a via, through-hole, SMT, or fiducial. The Gerber X2 format directs all outputs to one single folder.

As the Gerber X2 is both forward and backward compatible with the RS-274X standard, it helps any X2 reader to interpret Gerber RS-274X files correctly. Therefore, fabricators using the Gerber X2 process will have no trouble interpreting legacy fabrication files created in the Gerber RS-274X format and vice versa.

The IPC-2581 File Format

Contributors from a wide range of PCB industry segment initiated, developed, and drove the IPC-2581 standard. These industries included MES, CAD/CAM and PLM vendors, PCB fabricators, contract manufacturers, as well as OEMs.  The IPC-2581 is a single data format and within a single file, contains all aspects of the PCB design, such as layer stackup, materials, assembly, and test details.

With the IPC-2581 standard, the designer can include details of layer stack and information on materials to ensure proper layer order. The standard is suitable for stackups of complex board design such as related to rigid-flex boards, and is capable of handling special materials. It can also include drill and mill data for blind, buried, and filled via types. It also supports information on back drilling, V-grooves, slots, and cavities. For bare board testing, designers can include the net-list as well.

In addition to a complete set of fabrication data, the IPC-2581 can also hold assembly data. Therefore, it can contain not only the pick-and-place information, but also the information on polarity and rotation of a component, enabling support for both stacked and embedded components.

In addition to assembly drawings, the IPC-2581 standard has the capability to generate the documentation for bill of materials and purchasing. Therefore, the standard can tie up with PLM/ERP system data to create links between design and supply chain facilities. The greatest advantage of the IPC-2581 is one single file containing the entire data related to fabrication and assembly.

Guidelines & Best Practices in Flexible Printed Circuit Board Design

Written by Rush PCB on . Posted in PCB, PCB Assembly and component, PCB Manufacturing

With several industries now increasingly using flexible printed circuit boards (PCBs), it is becoming necessary to focus on the requirements, processes, education on terminology, and best practices for maintaining a high probability of first-pass success for making flex PCBs. As the name suggests, these designs consist of multiple layers of flexible circuit substrates.

Flexible-Printed-Circuit-Board

Compared to the design for rigid boards, designers have a larger variety of options when working with flexible PCBs containing dense designs conforming to a specific form factor. With flexible boards, product designers can apply greater functionality within smaller volumes of space more cost-efficiently, while also providing better stability and reliability.

Designing with flexible circuits offers some unique direct advantages such as a reduction in the number of connectors, resulting in cost-reduction and gain in physical space. There are indirect advantages as well, such as the reductions in time and cost involved in assembly. However, moving to flexible PCB usage brings its own set of challenges and concerns. Alleviation of these challenges and concerns requires the designer following some tips, best practices, and guidelines.

Benefits and Challenges of Flexible Circuits

Most electronic equipment today use flexible circuits. Such equipment include laptops, digital cameras, LCD televisions and monitors, mobile phones, and many more. Basically, original equipment manufacturers (OEMs) use flexible circuits whenever their products need to be compact, lightweight, and flexible. This is because the flexible technology offers them several benefits such as:

  • Improved reliability and cost reduction compared to traditional rigid-board approach.
  • Removal of connectors and additional solder joints leading to improved signal integrity, as cross-sectional changes to conductor paths are eliminated.
  • Routing is possible in three dimensions, reducing space requirements.
  • Improvements in electromechanical functionality of the product. This includes improved shock and vibration tolerance, weight reduction, higher heat resistance, and better dynamic bending.

To allow realization of the above benefits, designers must augment their traditional proficiency in rigid board design and expand their knowledge base to include flexible technology. Unless these designers make use of their individual learning curves and the various challenges of flexible technologies, there is a high potential of expensive design failures, even leading to project derailment. Furthermore, use of flexible circuit technology also demands ECAD design tools be chosen carefully to facilitate and ensure process compliance.

Guidelines and Best Practices

Eminent PCB manufacturers such as Rush PCB Inc. understand the criticality of education on requirements, terminology, processes, guidelines, and best practices for mitigating the challenges associated with flexible circuit design. Therefore, they have formulated some guidelines and best practices for addressing these challenges:

Managing the Stackup — Rigid and flexible circuits invariably have different stackups, and the designer must manage them efficiently. They also need to convey the stackup properly to the fabricator. This complex task is often made easier with an ECAD tool that offers region-specific and board-specific stackup designs.

Managing the Board Outline — it is necessary to properly configure and manage the flexible board throughout the design process. In fact, the actual design of a flexible circuit is more of an electromechanical project requiring close collaboration between the mechanical and electrical domains. Here, it is possible to save time provided there is ability to import mechanical CAD data and create multiple and complex board outlines automatically, thereby reducing the potential for errors.

Interaction with Fabricator — this is a very crucial aspect of the flexible board design. The fabricator offers helpful feedback to the designer regarding stiffness, bend requirements, keepout regions, material, stackup, etc. All this helps ensure the design can undergo fabrication with high reliability.

Analysis of Power and Signal Integrity — It is necessary to make sure the analysis tools recognize flexible layers and stackups and relate the analysis results to them, rather than assuming a single layer PCB with a uniform stackup.

Verification of 3-D Design — it is important the design team is capable of taking advantage of the available space in the product in all its three dimensions, while being able to identify potential design issues with the flexible circuit. They must be able to define the bend parameters such as bend origin, angle, and radius, while editing the design in 3-D. They must also be capable of viewing the design in relation to the enclosure, while performing 3-D flex-aware design rule checks (DRC).

As most circuit designers will likely be new to flexible design requirements, Rush PCB Inc. offer some guidelines as follows:

  • Keep both trace spacing and widths as large as possible.
  • Route traces using round corners, rather than ninety-degrees.
  • Round the corners of the traces using true arcs, as segmented arcs create stress fractures.
  • Allow the trace contour to mimic the outline contour of the board. Use an ECAD tool that does this automatically, as this will save time.
  • When routing more than one layer, make sure adjacent conductors have their traces staggered.
  • Follow electrical requirements while cross-hatching ground/power planes. Note that the cross-hatching significantly influences the impedance of any conductor using the plane as a return path.
  • Ensure the use of stiffeners where the flex circuitry demands placing parts such as a jack, plug, or an SMD connector.

Apart from the above, the area of the flex circuit, also called the flex bend region, where there will be a bend or twist, must follow a set of fundamental guidelines and best practices for maximizing its reliability:

  • Distribute the traces evenly through the region.
  • Make sure the traces are routed perpendicular to the direction of the bend.
  • Make sure the width of traces does not change within the region, as lack of symmetry may increase the chance of a stress buildup.
  • Do not place vias in the bend region.
  • Keep the crosshatched ground/power planes parallel to the region, with the crosshatch pattern at a 45-degree angle to the bend line. The ECAD tool should be able to calculate the angle of the crosshatch in relation to the bend line—this will save time when creating planes using bend lines with odd angles.
  • The bend radius is crucial to the flex circuitry, especially as the flex may have a static or a dynamic bend. While a static bend can stand a tighter bend radius, as it will bend only once during installation, the dynamic bend requires a greater radius, since this area of the circuit will face numerous bending throughout the lifespan of the product. Although the bend radius requirements vary based on the application, defining the bend radius properly is critical to avoid reliability issues from compression or tension in the area inside the bend.

Summary

Of course, the above guidelines and best practices are not all-inclusive, and are only introductory. However, these are the prime areas where a first-time flex designer needs to focus and familiarize him/her quickly, as these areas are important even for the simplest of flexible designs.

Along with the above fundamental areas of concern, designers will need to review additional items that include laminates and bonding materials, construction options, hole to bend distance, impedance control, coverlay design, and copper surface finish. The designer needs to confer with the fabricator for the review.

Finally, designers should take advantage of the latest ECAD tools available. This will not only improve their productivity but also reduce the development costs. For a highly probable first-pass success, it is necessary to combine proper tool deployment along with adequate education.

How does Conductor Surface Roughness matter?

Written by Rush PCB on . Posted in PCB, PCB Manufacturing

In RF circuit design, it is necessary to select the proper Printed Circuit Board (PCB) material for the application. In this context, modern simulation tools such as Computer Aided Engineering (CAE) help engineers by predicting the electrical behavior that circuits exhibit on various types of PCB materials. The tools use material parameters in their calculations, with dielectric constant (relative) being one of the important parameters. However, most such tools overlook an equally important material parameter of PCBs during the process of design—the roughness of the conductor’s surface. Contrary to popular belief, conductor surface is never perfectly smooth, and this has consequences in high-frequency PCB design.

Conductor Surface Roughness

Eminent PCB manufacturers such as Rush PCB Inc. understand the influence an imperfect conductor surface has on the performance of a PCB. In fact, scientists have since long studied the effect of grooves present on the conductor’s surface on a PCB, having noted the increase in losses caused by the grooves. Under worst-case scenarios, the grooves caused losses that were twice the original. The explanation the researchers extended was electromagnetic (EM) waves travel mostly along the conductor’s surface, such as along the copper signal trace on a PCB. The grooves actually cause the signal paths to become longer, as the EM waves, while traveling along the surface, have to enter into, and then exit out of the grooves.

Skin Effect

The surface roughness of the conductor thereby causes the EM waves taking a path with a longer mean resulting in the increase in losses. Effectively, higher the degree of surface roughness of the conductor, higher is the resistance from skin effects. When an EM wave propagates in a conductor, skin effect tends to change the EM wave’s current distribution to accumulate more towards the conductor’s surface rather than remaining deep inside the conductive material.

When using EM simulators or other commercial CAE tools, designers overcome the surface roughness of a conductor by relying on the traditional Morgan Correlation. They do this by involving a numerical factor for correcting the surface roughness, depending on the ratio of a smooth surface to a rough one. While calculating the loss of high-frequency microstrip lines, using Kr mostly does a good job of matching closely the results of measurement of conductor losses. However, there are cases where the measurements fail to match the computer predictions so closely.

Furthermore, such deviations between the calculated and the measured values can be expensive at the design stage, especially as achieving the desired performance requirements can lead to additional design iterations. Avoiding such delays in design might mean considering carefully the choice of an RF PCB laminate based on its conductor’s surface roughness.

Types of Copper Cladding

Manufacturers have to use some form of a cladding of copper conductor on the PCB substrate. Three types are most common—electrodeposited (ED) copper, rolled-annealed (RA) copper, and reverse-treated (RT) copper.

Forming RA copper foils involves rolling the copper ingot through a rolling mill, where subsequent passes through the rollers of the mill results in a copper foil consistently thin.

ED copper formation requires depositing copper onto a slowly rotating, highly polished drum made of stainless steel, within a bath containing a solution of copper sulfate. While the roughness of the copper surface where it meets the stainless-steel drum is analogous to that of RA copper, the copper surface of the deposition side facing the solution is much rougher.

RT foil production starts by plating the ED copper foil on the drum side, when the foil on the bath side is still low profile.

As the copper foil has to adhere to the dielectric material, which may range from FR-4 to polytetrafluoroethylene (PTFE) substrates, the copper surface has to be treated to increase its adhesion. The reason being a reasonably smooth copper surface does not adhere ideally to the dielectric. Whether formed by the RA or ED processes, an untreated copper film has a surface typically covered with tiny teeth-like imperfections, and the jagged surface is perfect for forming a powerful bond between the dielectric material and the copper.

However, this is in direct contrast with the requirements of a good transmission line, as the rough surface is then not suitable for transmission of high-frequency EM waves. On the other hand, a surface with a mirror-like finish on an utterly smooth copper foil is inadequate for foil-to-dielectric adhesion.

That means fabricating PCBs with low-loss copper traces while keeping good adhesion between the dielectric material and copper depends on accepting a compromise in the surface roughness of the copper foil.

Effect on Dielectric Constant

Another important factor involving the design and manufacture of PCBs is the relative permittivity of the dielectric material—commonly referred to as its dielectric constant Dk. In reality, Dk, rather than being a constant, varies with frequency.

The value of Dk, as the dielectric manufacturer’s data sheets report, is often assumed as the intrinsic property of the material. However, manufacturers generate the effective dielectric constant using a specific test method, sandwiching the dielectric material between two copper plates. When comparing simulation against measurements, this often causes a discrepancy in insertion loss—caused by increased phase delay resulting from surface roughness.

The explanation for the above is that surface roughness decreases the effective separation between the parallel plates, thereby increasing the electric field strength leading to an increase in capacitance, and that accounts for the increase in effective dielectric constant.

Laminate suppliers commonly use a method called the clamped stripline resonator test method, described by IPC-TM-650, to measure the effective dielectric constant of their material. As the measurement is highly dependent on the test apparatus and the measuring conditions, it does not guarantee the values are accurate for design applications. This is mainly due to reason that the copper foils used for the test are not physically bonded to the laminate, leaving small air gaps in between the layers. This affects the measurement results.

Designers have to get around this mismatch during simulations by using a multiplication factor for the dielectric constant for their impedance calculations, rather than using the Dk directly, as published in the data sheets.

Commercial PCB Laminates

Recognizing the effect of surface roughness on PCB performance at high frequencies, suppliers offer commercial laminates and copper foils in numerous profiles. They produce these laminates with copper treatment at different levels. For instance, they offer PCB materials with low profile (LP) copper conductors that provide excellent adhesion between the dielectric material and copper, while the smooth conductor surface improves etch definition and reduces conductor losses.

Other suppliers offer materials with reverse-treated copper foils of low profile, which are suitable for high-frequency analog and digital circuits. They come in a variety of panel sizes and dielectric thicknesses, with 1- or 0.5-oz. cladding of reverse-treated ED copper in low profile. Two popular models of laminates have dielectric constants of 3.38 & 3.48, while their dissipation factors at 10 GHz in the z-direction are 0.0027 & 0.0037. Both the materials are suitable for high-density circuits and are appropriate for low passive intermodulation distortion, low insertion loss, and superior signal integrity.

Conclusion

Although special material can help overcome the effects of surface roughness of conductors at high frequencies, selecting a PCB material for minimizing the effects of surface roughness is not a simple task. When targeting to minimize the effects of surface roughness, PCB materials copper foils of lower profile will perform better at higher frequencies showing low conductor losses, rather than with materials using foils of higher profiles.